- 5B25235B8644D82E985ED6CC354E5E6E0D94AAAF0D0B5A7B33D8A5586CF67A90F13885398E5C10B935C9EE991B1CC720AE9B832DFF9961D6090CF5E17A0445B9+ 42FCA47AC9E2CC3D6CEE432168B103FC0955CD846DAC338B966B81DE7D427A6CD682A3177B86BA3441BCB859FC4A6219011060292A8A8F756C053E391550E018m/mipsinst/i_instrs.asm(171 . 7)(171 . 7)
249 align GRAIN, db 0x90
250 _bad:
251 SetEXC EXC_RI ; Set the EXC_RI Exception
252 jmp _Handle_Exception ; Go straight to exception handler.
253 jmp _Handle_Exception_Other ; Go straight to exception handler.
254 ;-----------------------------------------------------------------------------
255
256 ;-----------------------------------------------------------------------------
(707 . 7)(707 . 7)
258 bt Imm, 0 ; Get low bit of vAddr
259 jnc _i_lh_aligned_ok ; If zero, vAddr was properly aligned;
260 SetEXC EXC_AdEL ; If vAddr was NOT properly aligned:
261 jmp _Handle_Exception ; Go straight to exception handler.
262 jmp _Handle_Exception_Other ; Go straight to exception handler.
263 _i_lh_aligned_ok: ; Load is to proceed normally:
264 mov ecx, Imm ; Save vAddr to ECX
265 xor TMP, TMP ; Clear TMP, where we will put the HW
(830 . 7)(830 . 7)
267 bt Imm, 0 ; Get low bit of vAddr
268 jnc _i_lhu_aligned_ok ; If zero, vAddr was properly aligned;
269 SetEXC EXC_AdEL ; If vAddr was NOT properly aligned:
270 jmp _Handle_Exception ; Go straight to exception handler.
271 jmp _Handle_Exception_Other ; Go straight to exception handler.
272 _i_lhu_aligned_ok: ; Load is to proceed normally:
273 mov ecx, Imm ; Save vAddr to ECX
274 xor TMP, TMP ; Clear TMP, where we will put the HW
(933 . 7)(933 . 7)
276 bt Imm, 0 ; Get low bit of vAddr
277 jnc _i_sh_aligned_ok ; If zero, vAddr was properly aligned;
278 SetEXC EXC_AdES ; If vAddr was NOT properly aligned:
279 jmp _Handle_Exception ; Go straight to exception handler.
280 jmp _Handle_Exception_Other ; Go straight to exception handler.
281 _i_sh_aligned_ok:
282 mov AUX, Imm ; Save Imm (vAddr) to AUX
283 ;; rS (ecx) is not needed any more, can be reused