- 6CEECB9422F3D01B04ED2ECB183FB96665FF969087E2967ECCEF2703337401AFB4F0EC91E4B7EFDA625AE4534BA1C3DABA539A1FC794B2E594D7404DDF72399C
+ 1427E0C04C15C733AED037B1A56252C2F7F8EE7960171AB548B6CE1244320EA1E9B4AA00045D94A4478AAD0E605E9206AA9E8B92581BE252B3E08C893ED372FE
m/cpustate.asm
(76 . 6)(76 . 19)
12 ;-----------------------------------------------------------------------------
13
14 ;-----------------------------------------------------------------------------
15 ; XMM Regs used for TLB Caching:
16 ;-----------------------------------------------------------------------------
17 %define Rd_E_Last_Tag xmm5 ; Last good Tag on reading Even vAddr
18 %define Rd_E_Last_PFN xmm6 ; Last good PFN on reading Even vAddr
19 %define Rd_O_Last_Tag xmm7 ; Last good Tag on reading Odd vAddr
20 %define Rd_O_Last_PFN xmm8 ; Last good PFN on reading Odd vAddr
21 %define Wr_E_Last_Tag xmm9 ; Last good Tag on writing Even vAddr
22 %define Wr_E_Last_PFN xmm10 ; Last good PFN on writing Even vAddr
23 %define Wr_O_Last_Tag xmm11 ; Last good Tag on writing Odd vAddr
24 %define Wr_O_Last_PFN xmm12 ; Last good PFN on writing Odd vAddr
25 ;-----------------------------------------------------------------------------
26
27 ;-----------------------------------------------------------------------------
28 ; Access to MIPS Registers that live in MCPU (Emulator State) :
29 ;-----------------------------------------------------------------------------
30 ; Refer to given MIPS special Reg: