- 343FF34A3CBC7CD5D51C465B8B91754C546C841055B6E84DFC8E928262E958534E727DC20EC0900B103F82F57895CBFB372D0789FAE1410B593746F76125187A
+ D0FC5BD7C10B69136B93C51DEF7A043BB287515D3CEE61FBCC46C2F07024B12165C81B979658E748BE6DCD67FC48D73630FDEAEF1F0F0D99536A5E424D01E10C
m/mipsinst/m_instrs.asm
(486 . 11)(486 . 7)
27 jnz _mtc0_unknown ; ... then unknown; else:
28 and ebx, ~0x1F00 ; T := T & ~0x1F00
29 cmp ebx, Sr(CP0_EntryHi) ; Find whether changing CP0_EntryHi
30 je .Not_Changed_EntryHi ; ... if not, skip;
31 .Changed_EntryHi: ; If we are changing CP0_EntryHi:
32 Invalidate_TLB_Cache ; Invalidate both R and W TLB Caches
33 mov Sr(CP0_EntryHi), ebx ; CP0_EntryHi := ebx
34 .Not_Changed_EntryHi:
35 jmp _end_cycle ; Done
36 ;-----------------------------------------------------------------------------
37 _mtc0_r11: ; 0x0b